Blog: Reno Sub-Systems Expands its Intellectual Patent Portfolio to Cover Alternative Solid-State Technology
Reno Sub-Systems (Reno) is recognized as a leading supplier of differentiated matching network and RF power generator products that enable the semiconductor industry to move to sub-7nm process nodes. Reno uses a solid-state Electronically Variable Capacitor (EVCTM) matching network, which is a digital array that switches capacitance in ~10 µsec and offers auto-tune matching in less than ~500 µsec. Its technologies are backed by a broad patent portfolio that covers the solid-state EVCTM-based matching network/RF generator market segment. Reno first perfected and patented the use of solid-state EVCTM PiN diode and transistor RF switching technology on March 5, 2005.
Alternative Solid-State Technology
One alternative to Reno’s EVCTM PIN diode and transistor RF switching technology that others are pursuing uses a bipolar junction transistor (BJT)/insulated-gate bipolar transistor (IGBT)-based switch. This approach is typically limited to low current handling capacity. For this type of network, the ON resistance of the switch is 3 times that of the Reno PiN diode switch design, which translates to a lower efficiency for the matching network. Also, BJT has a 5 times higher OFF state parasitic capacitance, limiting operation at higher frequencies, which does not alleviate the need for high voltage such as 800V.
An alternative some competitors provide uses a metal-oxide-semiconductor field-effect transistor (MOSFET) in series with the diode, with the MOSFET acting as a self-biasing circuit that will eventually shut off the diode. However, since the voltage across the diode must rise above the diode drop to allow the diode to conduct, this distorts the sinusoidal signal every time the signal crosses zero. This RF distortion will impact plasma performance and stability. Reno’s PiN diode-based design avoids RF distortion.
Reno pursued and patented another technology using MOSFET-based switches as the actual RF switch, in place of the PiN diode. It features our unique use of an automated parasitic capacitance compensation circuit. Two MOSFETs turn ON or OFF in sync; therefore, there is no distortion of the sinusoidal signal. The use of MOSFETs as RF switches does not suffer from the latching problems that BJTs and IGBTs would. In a latching situation, if a large current flows through the BJT or IGBT, it can latch the internal parasitic transistor in the ON position, which would make it very difficult to shut off the BJT or IGBT. A MOSFET-based RF switch can therefore be used in an impedance matching network configured to provide variable capacitance or inductance. We have also solved a technical issue with parasitic capacitance that is a significant problem in high-frequency circuits and is often the factor limiting the operating frequency and bandwidth of electronic circuits. Our patents describe a switching circuit that uses a switching transistor and a tuning inductor to cancel parasitic capacitance.
In addition, Reno invented a way to use MOSFETs, JFETs, IGBTs, etc., as the driver for the PiN diode switch. In this case, there is an overlap time between the device that is turning ON and the device that is turning OFF. During this overlap time, both are partially ON and a current can “shoot-through” both, which will cause heating and damage. The amount of current that can pass through is dependent upon the voltage difference between the high voltage and the low voltage across the two ends of the driver. A larger voltage will cause larger shoot-throughs. Higher RF power matches would require higher blocking voltages; therefore, higher power matching networks will have an even higher shoot-through problem. Reno invented a “dead-time driver circuit” to prevent this shoot-through current problem.
Reno’s Alternative Solid-State Technology Patents
This series of patents has pioneered the technically superior methodology of using MOSFETs as the diode-based RF switch, as well as MOSFETs used as the driver switch for matching networks.
- US 9,306,533 – RF Impedance Matching Network, Mavretic, Priority Feb 2015.
Describes a “pi” type electronic matching network using an impedance transformation network at its input and virtual grounds. This patent further describes using capacitors or inductors as the switching elements.
- US 9,525,412 – Switching Circuit, Mavretic, Priority Feb 2015.
Describes a cascode switch configuration, where a passive switch is controlled by a driving switch, enabling higher voltage operation.
- US 9,584,090 – RF Impedance Matching Network, Mavretic, Priority Feb 2015.
Describes a “pi” type electronic matching network using an impedance transformation network at its input and virtual grounds. The patent further describes using capacitors or inductors as the switching elements.
- US 9,729,122 – Switching Circuit, Mavretic, Priority Feb 2015.
Describes a single- or multi-FET switch combination to provide high voltage operation.
- US 20190267212 – RF Power Amplifier, Mavretic, Priority May 2018.
Describes a method to prevent current “shoot-through.”
- US 10,431,424 – Parasitic capacitance compensation circuit, Mavretic, Priority Dec 2017.
Describes a parasitic capacitance compensation circuit which tunes out substantially all parasitic capacitance of the switch.
- US 10,679,823 – Switching circuit, Mavretic, Priority Jan 2018.
Describes a switching transistor and a tuning inductor that cancels parasitic capacitance.
Why Is Reno’s Approach Better?
Alternative solid-state technologies used by others have shown wide variations (~7ms) in match times and limited power level capability. For short processes, such as in an ALD type of system, where RF ON times could be 50ms to 100ms, 7ms of variation has a significant impact on yield. Reno’s matching networks have proven, on-plasma repeatability of 0.5ms or less. Reno’s EVCTM technology using MOSFET/PiN diode switch enables the development of matching networks that are higher power, higher frequency, and higher efficiency.
This run-to-run repeatable and accurate instantaneous match technology enables the precise, high aspect ratio, selectively anisotropic sharp-edge plasma processing required for today’s and tomorrow’s devices, including 3D structures. Reno’s patented EVCTM matching networks reduce match time, widen the process window, increase plasma stability, and deliver the exact amount of RF power to every wafer, every lot, on every tool.