Reno Awarded Three New Substantive Patents for RF Matching Networks and RF Power Amplifier

Image from one of Reno's new patents for its RF technologies.

Reno Awarded Three New Substantive Patents for RF Matching Networks and RF Power Amplifier

1) US Patent #10,984,985 RF Impedance Matching Network Issued April 20, 2021, priority February 20, 2015 and February 18, 2016.


In the case of using a solid-state matching network, certain elements are used as switching circuits to control the variable inductance. This patent describes an impedance matching network that includes an electronically variable reactance element (EVRE), comprising discrete reactance elements and corresponding switches. The switches are configured to switch in and out the discrete reactance elements to alter a total reactance provided by the EVRE. A monitoring circuit is operably coupled to the EVRE. For each discrete reactance element, the monitoring circuit monitors a value related to the discrete reactance element, or its corresponding switch. Upon determining that the monitored value exceeds a predetermined amount, the discrete reactance element of the EVRE is prevented from switching in or out.


This patent covers the protection scheme for the EVRE, including use of electrical and thermal monitoring circuits. This type of protection scheme is key in developing reliable products and for protecting EVREs in high power applications. Reno’s priority date of February 20, 2015 gives us broad intellectual property protection for this novel circuit design.



2) US Patent #10,984,986 New Pin Diode Topology to Increase Matching Network Switching Speed Issued April 20, 2021, priority June 29, 2015.


This patent describes a switching circuit using two PIN diodes in parallel. This includes a solid-state RF impedance matching network for a plasma chamber with at least one electronically variable capacitor (EVC) that comprises discrete capacitors, each having a corresponding switching circuit. Each switching circuit is configured to switch in and out its corresponding discrete capacitor to alter a total capacitance of the EVC. Each switching circuit could include PIN diodes operably coupled to the discrete capacitor, a capacitor coupled in series with the first diode, and a second diode operably coupled to the discrete capacitor. The second diode is parallel to the first diode and the capacitor is coupled in series.


The described embodiments disclose a matching network that can more effectively handle high voltages generated in a network. Further, the embodiments avoid or minimize the need for increased component sizes (as typically required for a vacuum variable capacitor (VVC)) or increased numbers of peripheral components (as typically required with an EVC). Further still, the embodiments provide a solution that has a lower cost than previous methods of addressing high voltages in a matching network. Also, the embodiments can increase the usable range of a matching network without sacrificing the impedance range, using a more expensive, larger, higher voltage component, or adding more peripheral components to meet the voltage requirements.



3) US Patent. #11,017,983 RF Power Amplifier: Issued May 25, 2021, priority February 18, 2015.


This patent describes an RF power amplifier including a first and second transistor in parallel, wherein a gate of the first transistor and a gate of the second transistor are configured to be driven by an RF source. A third transistor comprising a drain is operably coupled to both a source of the first transistor and a source of the second transistor. A control circuit is operably coupled to a gate of the third transistor and configured to alter a gate-to-source voltage of the third transistor, thereby altering a drain current of the first transistor and the second transistor, thereby altering an output power of the RF power amplifier.


This technique is helpful to stabilize the gain of the amplifier. By controlling the current in this way, the system does not interrupt the current flow in the choke inductors and filters. The operation of these amplifiers is therefore more efficient under abrupt output load impedance changes such as this application in the semiconductor industry, where such amplifiers are driving the plasma load during deposition or etching. In summary, this circuit design allows for better stability and higher current loads.